TimingDesigner 9.0 Design Kits

About TimingDesigner Design Kits

Today, engineering teams in the electronics industry face unprecedented challenges in product development characterized by shorter design cycles, stringent cost constraints, new feature requirements, and smaller geometries—in order to help you accelerate through these challenges EMA has integrated Design Kits into TimingDesigner 9.0.

TimingDesigner design kits are pre-assembled timing diagrams of common design components complete with all specified libraries for speed and voltage ratings. These kits are intended to provide designers with a time saving head-start for static timing analysis of their designs, providing all documented timing protocols associated with one or more design components. They are assembled for easy importation into TimingDesigner’s Manager Window, allowing quick assembly of timing projects. Each Design Kit Component is parameterized where applicable so that configuration options that affect timing relationships are accurately represented. Also included are the manufacturer’s data sheet, assembly notes, and any other pertinent documentation.

Design Kit Availability
TimingDesigner Design Kits are available through EMA’s Engineering Resource Center (ERC), FREE of charge to all customers with a valid maintenance contract.

To download design kits, simply login to the ERC at http://support.ema-eda.com select the “Downloads” tab, and then scroll down to the “TimingDesigner Design Kits” section. On the ERC you can navigate the directory tree and select the actual kit for download. Below you will find a listing of the design kits currently available and under construction.


TimingDesigner Design Kits is just one of the services requested by our customers to enhance their design experience. We will continue to develop and expand the availability of these kits in order to server our customers with the utmost in quality, service, and value.

Design Kit Features

Diagram Protocols
All Design Kits feature timing protocols as described in the associated component data sheet from which it was created. As an example, read, write, and refresh operations are a few of the timing diagram protocols provided with most of the DRAM Design Kits, along with the library files of associated speed grade timing parameters. By selecting the desired DRAM Design Kit and importing it into your TimingDesigner Manager window, you are instantly provided with the expected signal level protocol timings for each documented operation of the device. A quick setup of your relative design parameters will then give you the timing-accurate waveforms for the component and allow you to see how control and data signals will need to be manipulated to meet timing.

Multiple Libraries
If the Design Kit Component supports multiple speed grades or voltage values, the kit will include libraries for each to provide the correct timing relationships for your application needs. Each library is accessible via an Alias reference in the Parameter Spreadsheet window allowing a single entry change to re-characterize the waveforms for the new timing library. This allows designers to determine which specific version of the device they need for the most cost effective yet high-performing designs. All libraries are accessible for editing and review from the Manager window.

Associated Documentation
Each Design Kit includes the PDF data sheet from which it was built, and any other appropriate documents that aide in design implementations with that component. These documents are provided as a reference source and are accessible from the Manager window.

Using Design Kits
To use the Design Kits, simply import into the Manager window. Then it’s just a matter of merging diagrams together and connecting the appropriate control signals. Once complete, the diagram will reveal how your specific design operations are complying with each component’s timing requirements. You can easily adjust design parameters to see what effect these changes will have on overall design operation. Each diagram can be saved off as a separate diagram file to preserve the original design kit integrity.