Diagram Protocols
All TimingDesigner Design Kits feature timing protocols as described in the associated component
data sheet from which it was created. Protocols such as read, write, and refresh operations are
a few of the many diagrams provided with DRAM Design Kits for example. By selecting the desired
Design Kits and importing each into your TimingDesigner Manager window, you are instantly
provided with all signal level protocol timings for each documented device. These diagrams allow
quick setup of your relative design parameters providing timing-accurate waveforms that further
provide details on how to control and manipulate the necessary signals to meet timing.
Multiple Libraries
Each Design Kit includes timing parameter libraries for each associated speed grade and/or
voltage rating so that designers can easily determine which specific version of the device they
need for the most cost effective yet high-performing designs. Library changes are made via an
Alias reference in the Parameter Spreadsheet window allowing a single entry change to
re-characterize the waveforms for the associated timing library. TimingDesigner’s Manager window
provides access to all libraries for editing and review.
Associated Documentation
Each Design Kit also includes the PDF data sheet from which it was built and may include other
documentation to aide in design implementations with that component. These documents are
provided as a reference source and are also accessible from TimingDesigner’s Manager window.
Design Kit Installation Instructions
Find out more:
TimingDesigner Datasheet
Design Kit Datasheet